1. Field of the Invention
The present invention relates to integrated circuits and more particularly the input stages of CMOS logic integrated circuits supplying a logic signal according to an analog input signal.
2. Description of the Related Art
Generally speaking, the input stages of integrated circuits have inputs having a switch level centered around half of the supply voltage. This condition is easily obtained for example using the input stage represented in FIG. 1. In FIG. 1, the input stage INST1 comprises a balanced inverter comprising a PMOS transistor MP1 and an NMOS transistor MN1. The gate of the transistors MP1 and MN1 is connected to the input Vin of the circuit. The drains of the transistors MN1 and MP1 are connected to the output Vout of the circuit. The source of the transistor MP1 receives the supply voltage Vdd. The source of the transistor MN1 is connected to the ground.
The transistors MN1 and MP1 have similar threshold voltages in absolute value. When the transistors MN1 and MP1 have the same geometric dimensions, the transistor MN1 has a conductance two to three times greater than the conductance of the transistor MP1. This property is due to the mobility of the electrons that is two to three times greater that the mobility of the holes. If the width-to-length ratio W/L of the transistor MP1 is two or three times greater than the ratio of the transistor MN1, the two transistors then have the same conductance if they further receive the same substrate-gate voltage in absolute value. Due to its symmetry, the input stage INST1 has a switch threshold voltage equal to half of the supply voltage (Vdd/2). Depending on whether the input voltage Vin is greater or lower than the switch threshold voltage, the voltage of the output signal Vout is equal to 0 or Vdd.
Certain applications require a switch threshold that is not equal to Vdd/2, but to another fraction of the supply voltage Vdd, or to a fixed voltage not linked to the voltage Vdd. In addition, the threshold voltages of the n- and p-channel MOS transistors can be different in absolute value. In certain applications, the input stages must be able to operate at low voltage, close to the threshold voltages of the transistors of the integrated circuit.
In such situations, a voltage comparator comparing the voltage applied at input with a reference voltage is generally used. Typically, such a comparator is produced using a differential amplifier. An example of an input stage comprising a differential amplifier is represented in FIG. 2. The input stage INST2 represented in FIG. 2 comprises a current mirror differential amplifier DAMP comprising an input receiving the input voltage Vin and an output O1 connected to the output Vout of the input stage INST2 through three cascade-arranged inverters I1, I2, I3.
Classically, the amplifier DAMP comprises an input branch receiving the input voltage Vin and a reference branch receiving a reference voltage Vref1. The input branch comprises a p-channel MOS transistor MP2 the source of which receives the supply voltage Vdd and the drain of which is connected to the drain of an n-channel MOS transistor MN2. The gate of the transistor MN2 receives the input voltage Vin. The reference branch comprises a p-channel MOS transistor MP3 the source of which receives the supply voltage Vdd and the drain of which is connected to the drain of an n-channel MOS transistor MN3. The gate of the transistor MP2 is connected to the gate and to the drain of the transistor MP3.
The sources of the transistors MN2 and MN3 are connected to the drain of an n-channel MOS transistor MN4 the source of which is connected to the ground. A reference voltage VrefN is applied to the gate of the transistor MN4, such that the saturation current of the transistor MN4 is equal to a reference current IrefN. IrefN therefore represents the maximal current likely to pass through the transistor MN4. The output O1 of the amplifier DAMP is connected to the drains of the transistors MP2 and MN2.
If the voltage Vin is greater than the voltage Vref1, the voltage at the output O1 decreases by tending towards the voltage GND1 of the drain of the transistor MN4. Conversely, if the voltage Vin is lower than the voltage Vref1, then the voltage is equal to the supply voltage Vdd. The output O1 supplies a signal biased under a low current. The inverter I1 is produced with transistors designed to be able to switch rapidly despite a low current available at the output O1. The W/L ratios of the transistors of the inverters I1, I2 and I3 have increasing values from I1 to I3, to shape the signal coming from the output O1 and to supply a logic signal at the output Vout.
The amplifier DAMP imposes certain limitations on the value of the reference voltage Vref1. Indeed, the amplifier DAMP only operates in the presence of a sufficient positive current i in the reference branch (comprising the transistors MP3 and MN3). The transistor MN3 must therefore allow a minimum current to pass. For this purpose, the voltage Vref1 must be greater than the threshold voltage Vtn of the transistor MN3. To reduce the effect of the constraint imposed by this condition, native n-channel transistors are preferably used that have a lower threshold voltage Vtn.
In addition, if the voltage Vref1 is lower than the threshold voltage Vtn of the transistor MN3, the input stage does not operate at all. The output voltage Vout can then vary randomly, which can be a dangerous operating condition for the integrated circuit equipped with the input stage. As a result, to maintain the amplifier DAMP in a fully operational state, in given temperature and supply voltage conditions, and for a given manufacturing chain, the voltage Vref1 must be sufficiently greater than the threshold voltage Vtn of the transistor MN3. This condition proves to be all the more restrictive as the variations in the voltage Vtn can be totally decorrelated from the variations in the voltage Vref1.
Typically, the transistor MN3 has for example a threshold voltage Vtn at ambient temperature of 450 mV, this voltage possibly varying by +/−100 mV according to the manufacturing conditions. The temperature coefficient, i.e., the variation rate of the threshold voltage according to the temperature is equal to approximately −2 mV/° C. The result is that, in a recommended temperature variation range from −40 to +85° C., the threshold voltage of the transistor MN3 can vary from 230 to 680 mV. To guarantee the operation of the amplifier DAMP, the voltage Vref1 must be greater than 700 mV when the threshold voltage Vtn of the transistor MN3 reaches 680 mV. If the voltage Vref1 has its own variation range, it can reach 1 volt.
Furthermore, the current passing through each of the input and reference branches must be low to limit the current consumption of the circuit.